A number of new technology initiatives, both in hardware and software, are being planned to enhance routing architectures, such as: 1) The introduction of multi-CPU processors; 2) The growing use of dedicated switching engines; 3) The longer term migration to a software foundation that lends itself to higher availability and a more structured software environment.
Current software switching paths have many drawbacks that prevent the utilization of these new technology initiatives. The switching path is tightly integrated inside the operating system (OS) and uses data structures and subroutine calls to implement features, thus making it difficult to abstract out the control plane. Also, new features (such as security or QoS features) have to be explicitly integrated into the feature path, causing performance or integration issues. Operating in a distributed system (e.g., systems where switch processing is performed on the line card instead of by the route processor) requires considerable additional work, such as writing IPC stubs. Further, this tightly integrated code is not suitable for running in a tightly coupled symmetric multi-processor system (SMP).
Additionally, current packet processing paths utilize run time checks for testing whether certain features should be applied to packets. This has several downsides such as performance issues, difficulty of integrating new features, and lack of modularity.
As result of the above considerations, it is clear that an improved software switching path is required to be able to take advantage of the new technology initiatives.